Synchronous SRAM chip, 36M-bit density, 1M x 36 configuration, featuring a 0.45ns maximum access time and 200MHz maximum clock rate. This surface-mount component utilizes a QDR data rate architecture and pipelined operation. It operates from a 1.8V supply voltage, with a 165-pin FBGA package measuring 17mm x 15mm x 0.89mm.
Cypress CY7C1415JV18-200BZXC technical specifications.
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