Synchronous SRAM chip, 36M bit density, 1M x 36 configuration, featuring a 0.45 ns maximum access time and 250 MHz maximum clock rate. This QDR, pipelined architecture component operates at 1.8 V typical supply voltage. Housed in a 165-pin FBGA package with a 1 mm pin pitch, it is designed for surface mounting.
Cypress CY7C1415JV18-250BZC technical specifications.
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