64Mbyte SDRAM module featuring an 8Mx64 organization with 8 chips per module, each configured as 4Mx16. This 168-pin UDIMM offers a maximum clock rate of 133 MHz and a 64-bit data bus width. Operating at a typical 3.3V supply voltage, it supports a CAS Latency of 2 and operates within a temperature range of -40°C to 85°C. The module utilizes TSOP chip packaging and is designed for socket mounting.
PackageUDIMM
MountingSocket
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Technical Specifications
Microchip W3DG648V7D2I technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | UDIMM |
| Package Description | Unbuffered Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 168 |
| PCB | 168 |
| Package Length (mm) | 133.48(Max) |
| Package Width (mm) | 3.81(Max) |
| Package Height (mm) | 25.4 |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 64Mbyte |
| Module Type | 168DIMM |
| Maximum Clock Rate | 133MHz |
| Chip Density | 64Mbit |
| Subcategory | SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 8Mx64 |
| Chip Package Type | TSOP |
| Typical Operating Supply Voltage | 3.3V |
| Maximum Operating Current | 650mA |
| Min Operating Supply Voltage | 3V |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 4Mx16 |
| ECC Support | No |
| CAS Latency | 2 |
Compliance
| Cage Code | 60991 |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | 4A994.a |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
Datasheet
Microchip W3DG648V7D2I Datasheet
Download the complete datasheet for Microchip W3DG648V7D2I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.