512Mbyte SDRAM DRAM Module, 144SODIMM, featuring 64Mx64 organization with 8 chips per module. This unbuffered small outline dual in-line memory module offers a 64-bit data bus width and a maximum clock rate of 133 MHz with a 5.4 ns maximum access time. Operating at 3.3V, it utilizes TSOP chip package type and supports a CAS latency of 3. The non-lead-frame SMT component is designed for socket mounting and operates within a temperature range of -40°C to 85°C.
PackageUSODIMM
MountingSocket
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Technical Specifications
Microchip WED3DG6466V75AD1I technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | DIM |
| Package/Case | USODIMM |
| Package Description | Unbuffered Small Outline Dual In Line Memory Module |
| Lead Shape | No Lead |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 67.72(Max) |
| Package Width (mm) | 3.81(Max) |
| Package Height (mm) | 27.94(Max) |
| Mounting | Socket |
| Main Category | DRAM Module |
| Total Density | 512Mbyte |
| Module Type | 144SODIMM |
| Maximum Access Time | 5.4ns |
| Maximum Clock Rate | 133MHz |
| Chip Density | 512Mbit |
| Subcategory | SDRAM |
| Data Bus Width | 64bit |
| Number of Chip per Module | 8 |
| Organization | 64Mx64 |
| Chip Package Type | TSOP |
| Typical Operating Supply Voltage | 3.3V |
| Maximum Operating Current | 1200mA |
| Min Operating Supply Voltage | 3V |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Chip Configuration | 64Mx8 |
| ECC Support | No |
| CAS Latency | 3 |
Compliance
| Cage Code | 60991 |
| EU RoHS | No |
| HTS Code | 8473301140 |
| Schedule B | 8473300002 |
| ECCN | 4A994.a |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Microchip WED3DG6466V75AD1I Datasheet
Download the complete datasheet for Microchip WED3DG6466V75AD1I to view detailed technical specifications.
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