Integrated multiprotocol processor combines an M68000-family processor core with system integration and communications processing blocks. The device includes 1152 bytes of dual-port static RAM, one independent DMA controller, six serial DMA channels, three timers, interrupt control, programmable chip-select logic, and DRAM refresh control. Three full-duplex serial communications controllers support HDLC/SDLC, UART, BISYNC, DDCMP, transparent operation, and V.110 rate adaptation. The processor operates from a 4.5 V to 5.5 V supply with documented clock options up to 25 MHz, depending on orderable version.
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| Processor core | MC68000/MC68008 |
| System bus width | 8 or 16bit |
| On-chip dual-port RAM | 1152bytes |
| Serial communications controllers | 3 full-duplex SCCs |
| Serial DMA channels | 6 |
| Independent DMA controllers | 1 |
| Timers | 3 including watchdog timer |
| Programmable chip-select lines | 4 |
| Supported serial protocols | HDLC/SDLC, UART, BISYNC, DDCMP, transparent, V.110 |
| Physical serial interfaces | IDL, GCI/IOM-2, PCM highway, NMSI |
| Serial management controllers | 2 |
| Synchronous communication port | 1 SCP |
| Supply voltage | 4.5 to 5.5V |
| Clock frequency range | 8 to 25MHz |
| Commercial operating temperature | 0 to 70°C |
| Industrial operating temperature | -40 to 85°C |
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