Integrated multiprotocol processor combines an MC68302-based communications controller with an independent IEEE 802.3 Ethernet channel, DRAM controller, and IEEE 1149.1 JTAG interface. The Ethernet controller supports 10 Mb/s operation, a 16-bit system interface, dedicated transmit and receive DMA channels, 128-byte transmit and receive FIFOs, and 48-bit addressing. The device retains three serial communications channels, 1152 bytes of dual-port RAM, timers, interrupt control, and bus-interface features from the MC68302 architecture. Standard ordering information specifies 20 MHz and 25 MHz TQFP versions for 0 °C to 70 °C operation.
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| Processor family | MC68302-based integrated multiprotocol processor |
| Ethernet standard | IEEE 802.3 MAC |
| Ethernet data rate | 10Mb/s |
| Full-duplex Ethernet data rate | 20Mb/s |
| Ethernet bus interface width | 16bit |
| Transmit FIFO size | 128bytes |
| Receive FIFO size | 128bytes |
| Ethernet buffer descriptors | 128entries |
| Address recognition CAM | 64entries |
| Serial communication channels | 3channels |
| Dual-port RAM | 1152bytes |
| JTAG standard | IEEE 1149.1 |
| Package | 144 TQFP |
| Operating temperature | 0 to 70°C |
| Available clock frequencies | 20, 25MHz |
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