Synchronous SRAM chip with 36M-bit density, organized as 2M x 18 bits. Features a 20-bit address bus, dual ports, and QDR data rate architecture. Offers a maximum access time of 0.45 ns and a maximum clock rate of 200 MHz. Operates at a typical supply voltage of 1.8V, with a range of 1.7V to 1.9V. Packaged in a 165-pin Fine Pitch Ball Grid Array (FBGA) for surface mounting, with dimensions of 17mm x 15mm x 1.08mm and a 1mm pin pitch. Suitable for operation between -40°C and 85°C.
Renesas R1Q2A3618BBG-50IS technical specifications.
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