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Technical Specifications
Toshiba TLP582(ORINPA) technical specifications.
General
| Package Family Name | 11-19A1 |
| Package/Case | 11-19A1 |
| Pin Count | 5 |
| PCB | 5 |
| Package Length (mm) | 18.9 |
| Package Width (mm) | 6.5 |
| Package Height (mm) | 13 |
| Mounting | Through Hole |
| Input Type | DC |
| Output Type | Totem-Pole |
| Number of Channels per Chip | 1 |
| Polarity | Inverting |
| Direction Type | Uni-Directional |
| Minimum Isolation Voltage | 5000Vrms |
| Logic Gate Type | NAND Schmitt |
| Min Operating Temperature | -25°C |
| Max Operating Temperature | 85°C |
| Maximum Fall Time | 0.075us |
| Maximum Forward Current | 25mA |
Compliance
| Cage Code | S0562 |
| HTS Code | 8541408000 |
| Schedule B | 8541408000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Datasheet
Toshiba TLP582(ORINPA) Datasheet
Download the complete datasheet for Toshiba TLP582(ORINPA) to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.