XC7Z010-1CLG400I
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描述:

FPGA Zynq®-7000 Family 28000 Cells 28nm Technology 1V 400-Pin CSBGA

产地:

Republic of Korea

推出日期:

Mar 23, 2012

更新: 21-SEP-2024


查看更多Field Programmable Gate Arrays - FPGAs 属于 Advanced Micro Devices, Inc.

在线版本: https://www.datasheets.com/zh-cn/part-details/xc7z010-1clg400i-advanced-micro-devices--inc--50285827

overview概述

熟悉该组件的基本一般信息、属性和特征,以及其与行业标准和法规的符合情况。

lifeCycleinfo
EURohs
rohs yes
RoHSVersion
2011/65/EU, 2015/863
ECCNinfo
EAR99
autoMotive
yesYes
SupplierCageCodeinfo
6Z9Z3
HTSUSAinfo
8542310060
SCHDULEBinfo
8542310060
类别路径
Semiconductor > Programmable Devices > Programmable Logic Devices > Field Programmable Gate Arrays - FPGAs

pdf数据手册

通过下载该电子元件的数据手册来全面了解其。这个PDF文档包含了所有必要的细节,如产品概述、特性、规格、评级、图表、应用等等。

数据表预览

(Latest 版本)

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package封装

组件的包装信息提供了有关产品尺寸、重量和包装的重要细节。这有助于工程师确定产品是否符合其要求和期望。

Basic Package Type
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Package Family Name
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Supplier Package
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Package Description
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Lead Shape
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Pin Count
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PCB
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Tabinfo
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Package Length (mm)info
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Package Width (mm)info
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Package Height (mm)info
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Seated Plane Height (mm)info
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Pin Pitch (mm)info
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Package Diameter (mm)
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Package Material
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Mounting
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Package Outline
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manufacturing制造

制造信息指定了生产和组装该组件的技术要求和规格。这些信息对于制造商来说至关重要,以保持组件的质量和可靠性,并确保其与其他设备和组件兼容。

MSLinfo
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Maximum Reflow Temperature (°C)info
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Reflow Solder Time (Sec)info
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Number of Reflow Cycleinfo
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Reflow Temp. Source
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Maximum Wave Temperature (°C)info
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Wave Solder Time (Sec)info
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Wave Temp. Source
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Lead Finish(Plating)info
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Under Plating Materialinfo
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Terminal Base Materialinfo
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parametric参数

参数信息显示了该组件的重要特性和性能指标,这有助于工程师和供应链经理比较和选择最适合其应用和需求的电子组件。

生产线
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Typical Supply Current
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Maximum Power Dissipation
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Temperature Flag
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Tolerant Configuration Interface Voltage
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Copy Protection
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Maximum Internal Frequency
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Supplier Temperature Grade
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Maximum Differential I/O Pairs
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Maximum I/O Performance
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Maximum Distributed RAM Bits
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Digital Control Impedance
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Number of I/O Banks
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I/O Voltage
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Shift Registers
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Number of Global Clocks
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Minimum Storage Temperature
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Number of Inter Dielectric Layers
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Maximum Storage Temperature
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Maximum DSP Block Frequency
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Maximum MLAB Capacity
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Device PCIe Hard IP Blocks
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Number of Regional Clocks
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Maximum LVDS Data Rate
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JTAG Support
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Maximum Supply Current
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In-System Programmability
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Reprogrammability Support
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Tradename
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Device Logic Gates
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Device Logic Units
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Mega Multiply Accumulates per second
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Family Name
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Maximum Number of User I/Os
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Number of Registers
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RAM Bits
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Device Logic Cells
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Number of Look-up Table Input
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Device System Gates
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Ethernet MACs
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Number of Multipliers
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Minimum Operating Supply Voltage
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Processor Blocks
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Typical Operating Supply Voltage
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Transceiver Blocks
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Maximum Operating Supply Voltage
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Transceiver Speed
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Program Memory Type
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Dedicated DSP
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PCI Blocks
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Device Number of DLLs/PLLs
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Total Number of Block RAM
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Maximum Propagation Delay Time
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Giga Multiply Accumulates per Second
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Maximum Number of SERDES Channels
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Speed Grade
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Differential I/O Standards Supported
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Single-Ended I/O Standards Supported
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External Memory Interface
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Supported IP Core
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Supported IP Core Manufacture
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Minimum Operating Temperature
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Maximum Operating Temperature
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Programmability
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Process Technology
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CADsCAD模型

访问组件的3D CAD模型、符号和封装。轻松可视化其结构和尺寸,集成设计并优化性能。

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