FPGA evaluation board featuring a Xilinx FPGA, operating at a maximum clock frequency of 600 MHz. Includes 64MB RAM and 4MB of Flash program memory. Connectivity options comprise 2 USB ports, 1 SPI interface, 2 UARTs, and 7 GPIO pins. Supports LCD displays via an LVDS interface. Development environment utilizes a GUI IDE compatible with Windows 7, Vista, and XP, with JTAG support and 8 LEDs for status indication.
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Technical Specifications
Analog Devices EVAL-SDP-CH1Z technical specifications.
General
| Type | Evaluation Board |
| Supported Device | Xilinx |
| Supported Device Technology | FPGA |
| Maximum Clock Frequency | 600MHz |
| RAM Size | 64MB |
| Program Memory Size | 4MB |
| Program Memory Type | Flash |
| Main Program Memory Type | Flash |
| USB | 2 |
| SPI | 1 |
| GPIO | 7 |
| UART | 2 |
| Display Interface | LVDS |
| Display Type | LCD |
| IDE | GUI |
| Windows | Win 7|Win Vista|Win XP |
| Operating Systems | Win 7|Win Vista|Win XP |
| JTAG Support | Yes |
| Number of LEDs | 8 |
| Push Buttons and Switches | 1 |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
Datasheet
Analog Devices EVAL-SDP-CH1Z Datasheet
Download the complete datasheet for Analog Devices EVAL-SDP-CH1Z to view detailed technical specifications.
No datasheet is available for this part.