
Programmable Logic Device (PLD) featuring 64 macrocells and a 10ns propagation delay. This CMOS device operates with a maximum clock frequency of 125MHz and supports 32 inputs and 32 outputs, totaling 32 I/O lines. It is housed in a 44-terminal PQFP package (10x10mm) with a 0.80mm pitch, conforming to JEDEC S-PQFP-G44 standards. Designed for industrial temperature ranges (-40°C to 85°C), it requires a nominal supply voltage of 5V (4.5V to 5.5V).
Atmel ATF1504AS-10AU44 technical specifications.
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