
This programmable logic device (PLD) is a CMOS, surface-mount component featuring 64 macrocells and 2000 gates. It operates at a maximum frequency of 125MHz with a propagation delay of 10ns. The device supports an operating supply voltage of 5V, with a range of 4.75V to 5.25V, and exhibits a low maximum supply current of 10µA. It offers 37 programmable I/O pins and is packaged in a TQFP form factor.
Cypress CY37064P44-125AXC technical specifications.
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