
CMOS EE PLD with 64 macrocells, 2000 gates, and 37 programmable I/Os. Features a 10ns propagation delay and operates at a maximum frequency of 125MHz. Surface mountable in a 44-pin PLCC package with tin, matte contact plating. Offers a 5V operating supply voltage range of 4.75V to 5.25V and operates between 0°C and 70°C. RoHS compliant and lead-free.
Cypress CY37064P44-125JXC technical specifications.
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