CMOS EE PLD with 64 macrocells, 2000 gates, and 69 programmable I/Os. Features a 12ns propagation delay and 100MHz maximum frequency. Operates from a 3V to 3.6V supply voltage range, with a typical 3.3V operating voltage. Packaged in a 100-pin TQFP for surface mounting. RoHS compliant and lead-free.
Frequency100MHz
PackageTQFP
MountingSurface Mount
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Technical Specifications
Cypress CY37064VP100-100AXC technical specifications.
General
Package/Case
TQFP
Frequency
100MHz
Lead Free
Lead Free
Max Frequency
100MHz
Max Operating Temperature
70°C
Min Operating Temperature
0°C
Max Supply Voltage
3.6V
Memory Type
EEPROM,
Min Supply Voltage
3V
Mount
Surface Mount
Number of Gates
2000
Number of I/Os
69
Number of Logic Blocks (LABs)
4
Number of Logic Elements/Cells
4
Number of Macrocells
64
Number of Programmable I/O
69
Operating Supply Voltage
3.3V
Package Quantity
180
Packaging
Tray
Propagation Delay
12ns
Radiation Hardening
No
RoHS Compliant
Yes
Series
Ultra37000™
Turn-On Delay Time
12ns
Compliance
RoHS
Compliant
Datasheet
Cypress CY37064VP100-100AXC Datasheet
Download the complete datasheet for Cypress CY37064VP100-100AXC to view detailed technical specifications.
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