
CMOS EE PLD with 64 macrocells and 12ns propagation delay. Features 37 programmable I/Os, 2000 gates, and operates at up to 100MHz. Surface mountable in a TQFP package with tin, gold, or matte contact plating. Offers a 3V to 3.6V operating supply voltage and is RoHS compliant.
Cypress CY37064VP44-100AXC technical specifications.
| Package/Case | TQFP |
| Contact Plating | Tin, Gold, Matte |
| Frequency | 100MHz |
| Lead Free | Lead Free |
| Max Frequency | 100MHz |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 3.6V |
| Memory Type | EEPROM, |
| Min Supply Voltage | 3V |
| Mount | Surface Mount |
| Number of Gates | 2000 |
| Number of I/Os | 37 |
| Number of Logic Blocks (LABs) | 4 |
| Number of Logic Elements/Cells | 4 |
| Number of Macro Cells | 64 |
| Number of Macrocells | 64 |
| Number of Programmable I/O | 37 |
| Operating Supply Voltage | 3.3V |
| Package Quantity | 160 |
| Packaging | Tray |
| Propagation Delay | 12ns |
| Radiation Hardening | No |
| RoHS Compliant | Yes |
| Series | Ultra37000™ |
| Speed Grade | 100 |
| Turn-On Delay Time | 12ns |
| RoHS | Compliant |
Download the complete datasheet for Cypress CY37064VP44-100AXC to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.
