
CMOS EE PLD with 128 macrocells, 69 programmable I/Os, and 3800 gates. Features a 10ns propagation delay and operates at a maximum frequency of 125MHz. This surface mount device is housed in a TQFP package with tin, gold, and matte contact plating. It supports an operating supply voltage range of 4.75V to 5.25V and is RoHS compliant.
Cypress CY37128P100-125AXC technical specifications.
Download the complete datasheet for Cypress CY37128P100-125AXC to view detailed technical specifications.
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