
High-performance EE PLD featuring 128 macrocells and 3800 gates. This CMOS device operates at up to 83MHz with a 15ns propagation delay. It offers 69 programmable I/Os and is housed in a 100-pin TQFP package with tin, gold, or matte contact plating. Designed for surface mounting, it supports an operating supply voltage of 3.3V, with a range of 3V to 3.6V, and operates from -40°C to 85°C.
Cypress CY37128VP100-83AXI technical specifications.
Download the complete datasheet for Cypress CY37128VP100-83AXI to view detailed technical specifications.
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