
PLL-based clock driver featuring 4 true outputs and 0 inverted outputs. Operates at a maximum frequency of 80MHz with a 50% duty cycle. Housed in a 32-pin PLCC package with tin, matte contact plating. Supports a 3V to 3.6V operating supply voltage range, with a nominal of 3.3V. RoHS compliant and lead-free, this integrated circuit is designed for clock buffering and driving applications.
Cypress CY7B991V-7JXC technical specifications.
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