Synchronous SRAM chip, 18M-bit density, featuring a 512K x 36 configuration. Achieves a maximum access time of 0.45 ns and supports a 400 MHz clock rate with DDR data rate architecture. This surface-mount component utilizes a 165-pin FBGA package with a 1mm pin pitch, operating at a 1.8V supply voltage. Designed for high-speed applications with a pipelined architecture.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Cypress CY7C11501KV18-400BZXI technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
FBGA
Package Description
Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
165
PCB
165
Package Length (mm)
15
Package Width (mm)
13
Package Height (mm)
0.89
Seated Plane Height (mm)
1.4(Max)
Pin Pitch (mm)
1
Package Weight (g)
0.49956
Package Material
Plastic
Mounting
Surface Mount
Density
18Mbit
Address Bus Width
18bit
Maximum Access Time
0.45ns
Timing Type
Synchronous
Maximum Clock Rate
400MHz
Data Rate Architecture
DDR
Density in Bits
18874368bit
Maximum Operating Current
750mA
Typical Operating Supply Voltage
1.8V
Number of Bits per Word
36bit
Number of Ports
1
Number of Words
512K
Min Operating Supply Voltage
1.7V
Max Operating Supply Voltage
1.9V
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Architecture
Pipelined
Compliance
Cage Code
65786
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A991.b.2.a
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Cypress CY7C11501KV18-400BZXI Datasheet
Download the complete datasheet for Cypress CY7C11501KV18-400BZXI to view detailed technical specifications.
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