18M-bit synchronous SRAM chip, featuring a 1M x 18 configuration with a 0.45ns maximum access time and 400MHz maximum clock rate. This surface-mount component operates at 1.8V, with a 19-bit address bus and DDR data rate architecture. Packaged in a 165-pin Fine Pitch Ball Grid Array (FBGA) measuring 15mm x 13mm x 0.89mm, it supports a pipelined architecture.
Cypress CY7C11681KV18-400BZC technical specifications.
Download the complete datasheet for Cypress CY7C11681KV18-400BZC to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.