Synchronous SRAM chip, 36M bit density, featuring a 1M x 36 configuration with a 2-port architecture. Offers a maximum access time of 0.45 ns and a maximum clock rate of 600 MHz, utilizing QDR data rate architecture. Operates at a typical supply voltage of 1.8V, with a voltage range of 1.7V to 1.9V. Packaged in a 165-pin FBGA with a 0.45ns access time, suitable for surface mounting.
Cypress CY7C1265XV18-600BZXCT technical specifications.
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