
Synchronous SRAM chip, 9M-bit density, featuring a 512K x 18 configuration. Offers a 2.5 ns maximum access time and operates at a 167 MHz maximum clock rate with QDR architecture. This surface-mount component is housed in a 165-pin Fine Pitch Ball Grid Array (FBGA) package measuring 15mm x 13mm x 0.89mm. Operates from a 2.5V supply voltage, with a 2-port, pipelined architecture.
Cypress CY7C1302DV25-167BZXCT technical specifications.
Download the complete datasheet for Cypress CY7C1302DV25-167BZXCT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.