
Synchronous SRAM chip, 18M-bit density, featuring a 1M x 18 configuration. Offers a maximum access time of 2.5 ns and a maximum clock rate of 167 MHz with QDR architecture. This surface-mount component utilizes a 165-pin Fine Pitch Ball Grid Array (FBGA) package with a 1 mm pin pitch. Operates at a typical supply voltage of 2.5V, with a range of 2.4V to 2.6V, and supports a pipelined architecture.
Cypress CY7C1303CV25-167BZC technical specifications.
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