Synchronous SRAM chip, 18M-bit density, 1M x 18 configuration, featuring a 2.5 ns maximum access time and 167 MHz maximum clock rate. This QDR architecture component operates at a 2.5 V supply voltage, with a 19-bit address bus. Housed in a 165-pin FBGA package with a 1 mm pin pitch, it supports surface mounting and operates within a -40 °C to 85 °C temperature range.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Cypress CY7C1303CV25-167BZXI technical specifications.
General
Basic Package Type
Ball Grid Array
Package Family Name
BGA
Package/Case
FBGA
Package Description
Fine Pitch Ball Grid Array
Lead Shape
Ball
Pin Count
165
PCB
165
Package Length (mm)
15
Package Width (mm)
13
Package Height (mm)
0.89
Seated Plane Height (mm)
1.4(Max)
Pin Pitch (mm)
1
Package Weight (g)
0.49956
Package Material
Plastic
Mounting
Surface Mount
Density
18Mbit
Address Bus Width
19bit
Maximum Access Time
2.5ns
Timing Type
Synchronous
Maximum Clock Rate
167MHz
Data Rate Architecture
QDR
Density in Bits
18874368bit
Maximum Operating Current
500mA
Typical Operating Supply Voltage
2.5V
Number of Bits per Word
18bit
Number of Ports
1
Number of Words
1M
Min Operating Supply Voltage
2.4V
Max Operating Supply Voltage
2.6V
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Architecture
Pipelined
Compliance
Cage Code
65786
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A991.b.2.a
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Cypress CY7C1303CV25-167BZXI Datasheet
Download the complete datasheet for Cypress CY7C1303CV25-167BZXI to view detailed technical specifications.
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