
Synchronous SRAM chip, 18M-bit density, featuring a 512K x 36 configuration. Delivers a maximum access time of 3 ns and supports a maximum clock rate of 200 MHz with SDR data rate architecture. This surface-mount component is housed in a 100-pin TQFP package with a 0.65 mm pin pitch, operating at a typical supply voltage of 3.3 V. Designed for high-speed applications, it offers a 4-port architecture and a pipelined design, suitable for demanding embedded systems.
Cypress CY7C1380DV33-200AXIT technical specifications.
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