Synchronous SRAM chip, 36M-bit density, 1M x 36 configuration, featuring a 0.45ns maximum access time and 200MHz maximum clock rate. This QDR II SRAM utilizes a pipelined architecture and operates from a 1.8V supply voltage. Housed in a 165-pin FBGA package with a 17mm x 15mm footprint and 1mm pin pitch, it supports surface mount installation.
Cypress CY7C1415JV18-200BZI technical specifications.
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