
Synchronous SRAM chip, 72M-bit density, featuring a 2M x 36 configuration. Delivers a maximum access time of 6.5 ns and operates at a maximum clock rate of 133 MHz with SDR data rate architecture. This surface-mount component utilizes a 165-pin Fine Pitch Ball Grid Array (FBGA) package with a 1mm pin pitch. Operates from a 3.3V supply voltage, with a maximum operating current of 335 mA, and supports a flow-through architecture.
Cypress CY7C1481BV33-133BZI technical specifications.
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