Synchronous SRAM chip, 72M-bit density, featuring a 2M x 36 configuration. Delivers a maximum access time of 0.45 ns and operates at a maximum clock rate of 450 MHz with QDR architecture. This surface-mount component utilizes a 165-pin Fine Pitch Ball Grid Array (FBGA) package, measuring 15mm x 13mm x 0.89mm. Operates from a 1.8V supply voltage, with a 20-bit address bus and 36 bits per word.
Cypress CY7C1564XV18-450BZXCT technical specifications.
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