Synchronous SRAM chip, 144M-bit density, featuring a 4M x 36 configuration with a maximum access time of 0.45 ns and a maximum clock rate of 550 MHz. This DDR SRAM utilizes a pipelined architecture and operates from a 1.8V supply voltage. Packaged in a 165-pin FBGA with a 17mm x 15mm footprint and 1mm pin pitch, it is designed for surface mounting.
Cypress CY7C1670KV18-550BZXCT technical specifications.
Download the complete datasheet for Cypress CY7C1670KV18-550BZXCT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.