Synchronous SRAM chip, 36M bit density, featuring a 1M x 36 configuration with a 19-bit address bus. Offers a maximum access time of 0.45 ns and a maximum clock rate of 450 MHz, utilizing QDR data rate architecture. Operates at 1.8V with a voltage range of 1.7V to 1.9V. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) for surface mounting, with dimensions of 15mm x 13mm x 0.89mm and a 1mm pin pitch.
Cypress CY7C2264XV18-450BZXCT technical specifications.
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