Synchronous SRAM chip with 36M-bit density, organized as 1M words by 36 bits. Features a 0.45 ns maximum access time and operates at a maximum clock rate of 633 MHz with DDR data rate architecture. This surface-mount component utilizes a 165-pin Fine Pitch Ball Grid Array (FBGA) package measuring 15mm x 13mm x 0.89mm. It operates from a typical supply voltage of 1.8V, with a range of 1.7V to 1.9V, and has a maximum operating current of 1230 mA. The architecture is pipelined, suitable for a wide range of demanding applications.
Cypress CY7C2270XV18-633BZXC technical specifications.
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