Synchronous SRAM chip, 72M-bit density, featuring a 4M x 18 configuration. Offers a maximum access time of 0.45 ns and a maximum clock rate of 600 MHz with QDR architecture. This surface-mount component utilizes a 165-pin FBGA package with a 1mm pin pitch, operating at 1.8V. Designed with a 20-bit address bus and dual ports, it supports pipelined architecture.
Cypress CY7C2563XV18-600BZC technical specifications.
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