Synchronous SRAM chip, 72M-bit density, featuring a 2M x 36 configuration. Achieves a maximum access time of 0.45 ns and a maximum clock rate of 600 MHz with DDR data rate architecture. Housed in a 165-pin FBGA package with a 15mm x 13mm footprint, this surface-mount component operates at 1.8V. Designed for pipelined architecture, it offers 20 address bits and 36 bits per word.
Cypress CY7C2570XV18-600BZXC technical specifications.
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