Cypress
CY7C342B-25JC
CPLD MAX® Family 2.5K Gates 128 Macro Cells 50MHz 0.65um Technology 5V 68-Pin PLCC
Frequency62.5MHz
PackageDIP
MountingThrough Hole, Surface Mount
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Technical Specifications
Cypress CY7C342B-25JC technical specifications.
General
Access Time
25ns
Package/Case
DIP
Frequency
62.5MHz
Lead Free
Contains Lead
Max Operating Temperature
70°C
Memory Type
EPROM,
Min Operating Temperature
0°C
Max Supply Voltage
5.25V
Min Supply Voltage
4.75V
Mount
Through Hole, Surface Mount
Number of Logic Blocks (LABs)
8
Number of Macrocells
10
Operating Supply Voltage
5V
Packaging
Rail/Tube
Propagation Delay
25ns
RoHS Compliant
No
Compliance
RoHS
Not Compliant
Datasheet
Cypress CY7C342B-25JC Datasheet
Download the complete datasheet for Cypress CY7C342B-25JC to view detailed technical specifications.
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