1M-bit NOR Flash memory with a parallel interface, featuring 128K x 8 organization and a maximum access time of 55ns. This integrated circuit operates at a typical 3.3V supply voltage, with a programming voltage range of 3 to 3.6V. The component is housed in a 32-pin PLCC (Plastic Leaded Chip Carrier) package, designed for surface mounting with J-lead configuration. It supports asynchronous timing and includes a top boot block, operating within a temperature range of -20°C to 70°C.
PackagePLCC
MountingSurface Mount
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Technical Specifications
Cypress MBM29LV001TC-55PD technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
LCC
Package/Case
PLCC
Package Description
Plastic Leaded Chip Carrier
Lead Shape
J-Lead
Pin Count
32
PCB
32
Package Material
Plastic
Mounting
Surface Mount
Density
1Mbit
Interface Type
Parallel
Maximum Operating Current
30mA
Block Organization
Asymmetrical
Architecture
Sectored
Programming Voltage
3 to 3.6V
Timing Type
Asynchronous
Maximum Access Time
55ns
Number of Words
128K
Boot Block
Yes
Typical Operating Supply Voltage
3.3V
Address Bus Width
17bit
Location of Boot Block
Top
Number of Bits per Word
8bit
Min Operating Temperature
-20°C
Max Operating Temperature
70°C
Compliance
Cage Code
65786
EU RoHS
No
HTS Code
8542320071
Schedule B
8542320070
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Cypress MBM29LV001TC-55PD Datasheet
Download the complete datasheet for Cypress MBM29LV001TC-55PD to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.