512M-bit NOR Flash memory with Serial (SPI, Dual SPI, Quad SPI) interface. Features 3V/3.3V operation, 14.5ns maximum access time, and 32-bit address bus. This 16-pin SOIC W package is surface mountable, constructed from plastic, and offers symmetrical block organization with sectored architecture. Supports boot block functionality at the bottom or top, with a density of 512M/256M/128M words and 1/2/4 bits per word. Operating temperature range is -40°C to 105°C.
PackageSOIC W
MountingSurface Mount
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Technical Specifications
Cypress S25FL512SAGMFVR11 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | SOIC W |
| Package Description | Small Outline IC Wide Body |
| Lead Shape | Gull-wing |
| Pin Count | 16 |
| PCB | 16 |
| Package Length (mm) | 10.3 |
| Package Width (mm) | 7.5 |
| Package Height (mm) | 2.55(Max) |
| Seated Plane Height (mm) | 2.65(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 512Mbit |
| Interface Type | Serial (SPI, Dual SPI, Quad SPI) |
| Maximum Operating Current | 100mA |
| Block Organization | Symmetrical |
| Architecture | Sectored |
| Programming Voltage | 2.7 to 3.6V |
| Timing Type | Synchronous |
| Maximum Access Time | 14.5ns |
| Number of Words | 512M/256M/128M |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 3|3.3V |
| Address Bus Width | 32bit |
| Location of Boot Block | Bottom|Top |
| Number of Bits per Word | 1/2/4bit |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 105°C |
Compliance
| Cage Code | 65786 |
| EU RoHS | Yes |
| HTS Code | 8542320051 |
| Schedule B | 8542320050 |
| ECCN | 3A991.b.1.a |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Cypress S25FL512SAGMFVR11 Datasheet
Download the complete datasheet for Cypress S25FL512SAGMFVR11 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.