Automotive I2C/SPI‑to‑dual UART bridge controller with 64‑byte TX/RX FIFOs, up to 33 Mbps SPI clock, and baud rates to 16 Mbit/s (4× sampling). Backward‑compatible with 16C450 UARTs, supports RTS/CTS and XON/XOFF flow control, RS‑485 direction control, IrDA SIR (115.2 kbit/s, optional 1.152 Mbit/s), and up to 8 GPIOs. Operates from 1.8 V, 2.5 V, or 3.3 V over −40 to +105 °C. Supplied in a 5×5 mm W‑QFN5050‑32 (ZH32). AEC‑Q100 Grade 2 qualified, PPAP capable, RoHS lead‑free and halogen‑free.
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| Interface | I2C/SPI to Dual UART |
| UART channels | 2 (full‑duplex) |
| TX/RX FIFO size | 64 per channelbytes |
| Max SPI clock | 33Mbit/s |
| Max UART baud rate (4× sampling) | 16Mbit/s |
| IrDA SIR speed | 115.2 (optional 1,152 kbit/s)kbit/s |
| GPIO pins | Up to 8pins |
| Character format | 5/6/7/8 data bits; even/odd/none parity; 1/1.5/2 stop bits |
| Flow control | Hardware RTS/CTS; software XON/XOFF (single/double) |
| RS‑485 support | Driver direction control and inversion; slave address detect |
| I2C mode | Slave; Fast‑mode compliant |
| SPI mode | Mode 0, Slave |
| Clock sources | 24 (crystal) / 64 (external clock)MHz |
| Supply voltage options | 1.8 / 2.5 / 3.3V |
| Operating temperature range | -40 to +105°C |
| Package | W‑QFN5050‑32 (ZH32), 5×5 mm, 0.5 mm pitch |
| MSL | MSL 1 |
| Thermal resistance, junction‑to‑ambient | 34.4°C/W |
| Thermal resistance, junction‑to‑case | 15°C/W |
| AEC‑Q100 grade | Grade 2 |
| Compatibility | Register set backward‑compatible with 16C450 UART |
| RoHS | Compliant; lead‑free per EU 2002/95/EC, 2011/65/EU, 2015/863/EU |
| Halogen/antimony Free | Yes (Green device) |
| Automotive | AEC‑Q100 Grade 2; PPAP capable; manufactured in IATF 16949 certified facilities |
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