UV PLD, 60ns, 128-Cell, CMOS, CPGA68, WINDOWED, CERAMIC, PGA-68
8-LAB 50MHz EPROM, 5V, 5.5V, -40°C to 85°C, Surface Mount PLCC
UV PLD, 60ns, 128-Cell, CMOS, CQCC68, WINDOWED, LCC-68
CPLD MAX® Family 2.5K Gates 128 Macro Cells 40MHz 0.65um (CMOS) Technology 5V 68-Pin PLCC T/R
