Industrial-grade registered bus transceiver, 8-bit, true output, BICMOS technology. Features dual terminal position, 56 terminals, and a 56-pin TSSOP package (6.1mm width). Operates with a 3.3V nominal supply voltage (2.7V-3.6V range) and offers a propagation delay of 5.6ns. Supports two functions with independent control and bidirectional data flow, triggered by a positive edge.
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Technical Specifications
Fairchild 74LVTH16652MTDX technical specifications.
General
| Max Operating Temperature | 85 |
| Number of Terminals | 56 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G56 |
| Width | 6.1 |
| Length | 14 |
| Pin Count | 56 |
| Number of Functions | 2 |
| Temperature Grade | INDUSTRIAL |
| Supply Voltage-Nom (Vsup) | 3.3 |
| Supply Voltage-Max (Vsup) | 3.6 |
| Supply Voltage-Min (Vsup) | 2.7 |
| Logic IC Type | REGISTERED BUS TRANSCEIVER |
| Family | LVT |
| Propagation Delay (tpd) | 5.6 |
| Number of Bits | 8 |
| Max I(ol) | 0.064 |
| Prop. Delay@Nom-Sup | 4.2 |
| Output Polarity | TRUE |
| Number of Ports | 2 |
| Power Supply Current-Max (ICC) | 5 |
| Count Direction | BIDIRECTIONAL |
| Control Type | INDEPENDENT CONTROL |
| Trigger Type | POSITIVE EDGE |
Compliance
| RoHS | Yes |
| HTS Code | 8542.39.00.01 |
| REACH | unknown |
| Military Spec | False |
Datasheet
Fairchild 74LVTH16652MTDX Datasheet
Download the complete datasheet for Fairchild 74LVTH16652MTDX to view detailed technical specifications.
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