Dual J-K Flip-Flop IC, AHC/VHC family, featuring negative edge triggering and complementary outputs. This 2-bit logic component operates with a supply voltage range of 2V to 5.5V, nominal 3.3V, and boasts a maximum operating frequency of 110MHz. Encased in a 16-pin SOIC package (PDSO-G16), it offers a propagation delay of 16.5ns and is rated for industrial temperature ranges from -40°C to 85°C.
Fairchild 74VHC112MX technical specifications.
| Max Operating Temperature | 85 |
| Number of Terminals | 16 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G16 |
| Width | 3.9 |
| Length | 9.9 |
| Pin Count | 16 |
| Number of Functions | 2 |
| Temperature Grade | INDUSTRIAL |
| Supply Voltage-Nom (Vsup) | 3.3 |
| Supply Voltage-Max (Vsup) | 5.5 |
| Supply Voltage-Min (Vsup) | 2 |
| Logic IC Type | J-K FLIP-FLOP |
| Family | AHC/VHC |
| Propagation Delay (tpd) | 16.5 |
| Number of Bits | 2 |
| Max I(ol) | 0.008 |
| Prop. Delay@Nom-Sup | 12 |
| Load Capacitance | 50 |
| Output Polarity | COMPLEMENTARY |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 135 |
| Max Frequency@Nom-Sup | 110000000 |
| RoHS | Yes |
| Eccn Code | EAR99 |
| Lead Free | Yes |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
Download the complete datasheet for Fairchild 74VHC112MX to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.