GS8662DT07BD-333I

Synchronous SRAM chip, 72M-bit density, featuring a QDR architecture for high-speed data transfer. This integrated circuit offers 8M words x 8 bits per word, with a 21-bit address bus and a maximum access time of 0.45 ns. Operating at a maximum clock rate of 333 MHz, it utilizes a dual-port design and a pipelined architecture. The component is housed in a 165-pin FBGA package with a 1mm pin pitch, designed for surface mounting. It operates from a 1.7V to 1.9V supply voltage, with a typical of 1.8V, and functions within an industrial temperature range of -40°C to 100°C.