Synchronous SRAM chip, 72M-bit density, featuring a dual-port architecture with 8M words x 8 bits per word. Achieves a maximum access time of 0.45 ns and a maximum clock rate of 350 MHz, utilizing a QDR data rate architecture. Operates at a typical supply voltage of 1.8V, with a range of 1.7V to 1.9V. Packaged in a 165-pin FBGA with a 1mm pin pitch, suitable for surface mounting.
GSI GS8662DT07BD-350I technical specifications.
Download the complete datasheet for GSI GS8662DT07BD-350I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.