Synchronous SRAM chip, 72M-bit density, featuring an 8M x 9-bit configuration with a dual-port architecture. Offers a maximum access time of 0.45 ns and a maximum clock rate of 450 MHz, utilizing a QDR data rate architecture. Packaged in a 165-pin FBGA with a 15mm x 13mm footprint and 1mm pin pitch, this surface-mount component operates at 1.8V. Designed for high-speed applications with a pipelined architecture.
GSI GS8662DT10BD-450T technical specifications.
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