Synchronous SRAM chip, 2M-bit density, organized as 64K words by 32 bits. Features a 7ns maximum access time and operates at a maximum clock rate of 66 MHz with SDR data rate architecture. This surface-mount component is housed in a 100-pin LQFP package with gull-wing leads, measuring 20mm x 14mm x 1.4mm. It requires a 3.3V supply voltage and supports a pipelined architecture.
Kioxia TC55V2325FF-7(FC) technical specifications.
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