The GAL6001-35P is a commercial extended temperature FPGA with a 24-pin dual-in-line package. It operates at a supply voltage of 5V, with a minimum of 4.75V and a maximum of 5.25V. The device has 10 outputs and 20 inputs, with a clock frequency of up to 22.9 MHz. It is suitable for use in a variety of applications, including those requiring a high level of integration and flexibility.
Lattice Semiconductor GAL6001-35P technical specifications.
| Max Operating Temperature | 75 |
| Number of Terminals | 24 |
| Min Operating Temperature | 0 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDIP-T24 |
| Width | 7.62 |
| Length | 31.855 |
| Pin Count | 24 |
| Temperature Grade | COMMERCIAL EXTENDED |
| Supply Voltage-Nom | 5 |
| Supply Voltage-Min | 4.75 |
| Supply Voltage-Max | 5.25 |
| Number of Outputs | 10 |
| Clock Frequency-Max | 22.9 |
| Number of Inputs | 20 |
| Number of I/O Lines | 10 |
| Architecture | PLS-TYPE |
| RoHS | No |
| Eccn Code | EAR99 |
| HTS Code | 8542.39.00.01 |
| REACH | not_compliant |
| Military Spec | False |
Download the complete datasheet for Lattice Semiconductor GAL6001-35P to view detailed technical specifications.
No datasheet is available for this part.