CMOS Programmable Logic Device (PLD) featuring 32 macrocells and 36 logic array blocks (LABs) within an 800-gate architecture. Offers a 7.5ns propagation delay and a maximum operating frequency of 400MHz. Operates from a 3V to 3.6V supply voltage with a typical operating supply current of 11.8mA. Designed for surface mount with a TQFP package, this device supports 30 I/O pins and operates across a temperature range of -40°C to 130°C.
Lattice Semiconductor LC4032V-75T44E technical specifications.
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