CMOS Programmable Logic Device (PLD) featuring 256 macrocells and 64 I/Os, with 256 programmable I/Os. Operates at a maximum frequency of 275MHz, with a propagation delay of 4.5ns and turn-on delay time of 4.5ns. Supports EEPROM memory type with 262144 bits of RAM. Surface mountable in a PBGA484 package, this lead-free and RoHS compliant component operates within a 3V to 3.6V supply voltage range.
Lattice Semiconductor LC5512MV-45FN484C technical specifications.
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