Complex Programmable Logic Device (CPLD) from the MachXO2 family, featuring 256 logic cells and 22 user I/Os. This surface-mount component utilizes a 32-pin Quad Flat No Lead (QFN) package with an exposed pad, measuring 5x5x0.84mm with a 0.5mm pin pitch. It operates from a 1.14V to 1.2V supply and offers in-system programmability via Flash memory. Suitable for applications within a 0°C to 85°C temperature range.
PackageQFN EP
MountingSurface Mount
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Technical Specifications
Lattice Semiconductor LCMXO2-256ZE-1SG32CES technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | QFN EP |
| Package Description | Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 5 |
| Package Width (mm) | 5 |
| Package Height (mm) | 0.84 |
| Seated Plane Height (mm) | 0.85 |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | MachXO2 |
| Device Logic Cells | 256 |
| RAM Bits | 0Kbit |
| Number of User I/Os | 22 |
| Program Memory Type | Flash |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Typical Operating Supply Voltage | 1.2V |
| Min Operating Supply Voltage | 1.14V |
| Programmability | Yes |
| In-System Programmability | Yes |
| Speed Grade | 1 |
Compliance
| Cage Code | 66675 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Lattice Semiconductor LCMXO2-256ZE-1SG32CES Datasheet
Download the complete datasheet for Lattice Semiconductor LCMXO2-256ZE-1SG32CES to view detailed technical specifications.
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