Async SRAM chip, 1M-bit density (128K x 8), featuring a 55ns maximum access time. This 32-pin TSOP-I surface-mount component operates from a 4.5V to 5.5V supply, with a typical 5V requirement. The asynchronous memory utilizes a 17-bit address bus and offers a 128K word count. Housed in a plastic Thin Small Outline Package (Type I) with gull-wing leads, it measures 8mm x 18.4mm x 1mm.
PackageTSOP-I
MountingSurface Mount
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Technical Specifications
Lyontek LY621024LL-55LLIT technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
SOP
Package/Case
TSOP-I
Package Description
Thin Small Outline Package (Type I)
Lead Shape
Gull-wing
Pin Count
32
PCB
32
Package Length (mm)
8
Package Width (mm)
18.4
Package Height (mm)
1
Seated Plane Height (mm)
1.2(Max)
Pin Pitch (mm)
0.5
Package Material
Plastic
Mounting
Surface Mount
Density
1Mbit
Address Bus Width
17bit
Maximum Access Time
55ns
Timing Type
Asynchronous
Density in Bits
1048576bit
Maximum Operating Current
60mA
Typical Operating Supply Voltage
5V
Number of Bits per Word
8bit
Number of Ports
1
Number of Words
128K
Min Operating Supply Voltage
4.5V
Max Operating Supply Voltage
5.5V
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Compliance
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Lyontek LY621024LL-55LLIT Datasheet
Download the complete datasheet for Lyontek LY621024LL-55LLIT to view detailed technical specifications.
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