Asynchronous SRAM chip with 1M-bit density, organized as 128K words by 8 bits. Features a maximum access time of 55 ns and operates from a 5V supply voltage (4.5V to 5.5V range). Housed in a 32-pin PDIP W through-hole package with a 2.54mm pin pitch. Suitable for operation between -20°C and 80°C, with a maximum operating current of 60 mA.
PackagePDIP W
MountingThrough Hole
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Technical Specifications
Lyontek LY621024PL-55LLET technical specifications.
General
Basic Package Type
Through Hole
Package Family Name
DIP
Package/Case
PDIP W
Package Description
Plastic Dual In Line Package Wide Body
Lead Shape
Through Hole
Pin Count
32
PCB
32
Package Length (mm)
41.91
Package Width (mm)
13.84
Package Height (mm)
3.94
Seated Plane Height (mm)
4.45(Min)
Pin Pitch (mm)
2.54
Package Material
Plastic
Mounting
Through Hole
Density
1Mbit
Address Bus Width
17bit
Maximum Access Time
55ns
Timing Type
Asynchronous
Density in Bits
1048576bit
Maximum Operating Current
60mA
Typical Operating Supply Voltage
5V
Number of Bits per Word
8bit
Number of Ports
1
Number of Words
128K
Min Operating Supply Voltage
4.5V
Max Operating Supply Voltage
5.5V
Min Operating Temperature
-20°C
Max Operating Temperature
80°C
Compliance
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Lyontek LY621024PL-55LLET Datasheet
Download the complete datasheet for Lyontek LY621024PL-55LLET to view detailed technical specifications.
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